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Document Number: 318080-002Notice: The Intel® Xeon® Processor 7200 Series and 7300 Series may contain design defects or errors known as errata which

Introduction10 Document Number: 318080-002The Intel® Xeon® Processor 7200 Series and 7300 Series support Intel® Virtualization Technology for hardwar

Thermal Specifications100 Document Number: 318080-002Notes:1. Please refer to Table 6-6 for discrete points that constitute the thermal profile.2. Ref

Document Number: 318080-002 101Thermal SpecificationsNotes:1. These values are specified at VCC_MAX for all processor frequencies. Systems must be des

Thermal Specifications102 Document Number: 318080-0023. Thermal Design Power (TDP) should be used for processor thermal solution design targets. TDP i

Document Number: 318080-002 103Thermal SpecificationsNote: Figure is not to scale and is for reference only.6.2 Processor Thermal Features6.2.1 Therma

Thermal Specifications104 Document Number: 318080-002speed dependent and will decrease as processor core frequencies increase. A small amount of hyste

Document Number: 318080-002 105Thermal Specificationsto reach the target operating voltage. Each step will be one VID table entry (see Table 2-3). The

Thermal Specifications106 Document Number: 318080-0026.2.5 PROCHOT# SignalAn external signal, PROCHOT# (processor hot) is asserted when the temperatur

Document Number: 318080-002 107Thermal Specifications6.3 Platform Environment Control Interface (PECI) 6.3.1 IntroductionPECI offers an interface for

Thermal Specifications108 Document Number: 318080-0026.3.1.2 Processor Thermal Data Sample Rate and FilteringThe DTS (Digital Thermal Sensors) provide

Document Number: 318080-002 109Thermal SpecificationsTable 6-10 shows how the PECI address is assigned to each of the processors based on the ClusterI

Document Number: 318080-002 11IntroductionSignals on the FSB use Assisted Gunning Transceiver Logic (AGTL+) level voltages. Section 2.1 contains the

Thermal Specifications110 Document Number: 318080-002Prior to a power on RESET# and during RESET# assertion, PECI is not guaranteed to provide reliabl

Document Number: 318080-002 111Features7 Features7.1 Power-On Configuration OptionsSeveral configuration options can be configured by hardware. The In

Features112 Document Number: 318080-002processor. The chipset needs to account for a variable number of processors asserting the Stop Grant SBC on the

Document Number: 318080-002 113FeaturesNotes:1. The specification is at TCASE = 50°C and nominal VCC. The VID setting represents the maximum expected

Features114 Document Number: 318080-0027.2.3 Stop-Grant StateWhen the STPCLK# pin is asserted, the Stop-Grant state of the processor is entered 20 bus

Document Number: 318080-002 115FeaturesWhile in the Stop-Grant state, SMI#, INIT#, BINIT# and LINT[1:0] will be latched by the processor, and only ser

Features116 Document Number: 318080-002Enhanced Intel SpeedStep Technology creates processor performance states (P-states) or voltage/frequency operat

Document Number: 318080-002 117FeaturesNote: Actual implementation may vary. This figure is provided to offer a general understanding of the architect

Features118 Document Number: 318080-002Note:1. This addressing scheme will support up to 8 processors on a single SMBus.7.4.2 PIROM and Scratch EEPROM

Document Number: 318080-002 119Features7.4.3 Processor Information ROM (PIROM)The lower half (128 bytes) of the SMBus memory component is an electrica

Introduction12 Document Number: 318080-002• Processor Information ROM (PIROM) — A memory device located on the processor and accessible via the Syste

Features120 Document Number: 318080-0022 Reserved Reserved for future use2 Processor Core Type From CPUID4 Processor Core Family From CPUID4 Processor

Document Number: 318080-002 121FeaturesDetails on each of these sections are described below. Note: Reserved fields or bits SHOULD be programmed to ze

Features122 Document Number: 318080-0027.4.3.1.2 PISIZE: PIROM SizeThis location identifies the PIROM size. Writes to this register have no effect.7.4

Document Number: 318080-002 123Features7.4.3.1.6 PDA: Package Data AddressThis location provides the offset to the Package Data Section. Writes to thi

Features124 Document Number: 318080-0027.4.3.1.9 FDA: Feature Data AddressThis location provides the offset to the Feature Data Section. Writes to thi

Document Number: 318080-002 125Features7.4.3.2 Processor DataThis section contains two pieces of data: • The S-spec of the part in ASCII format• (1) 2

Features126 Document Number: 318080-0027.4.3.2.2 SAMPROD: Sample/ProductionThis location contains the sample/production field, which is a two-bit fiel

Document Number: 318080-002 127Features7.4.3.3.2 FSB: Front Side Bus SpeedThis location contains the front side bus frequency information. Systems may

Features128 Document Number: 318080-0027.4.3.3.3 MPSUP: Multiprocessor SupportThis location contains 2 bits for representing the supported number of p

Document Number: 318080-002 129Features7.4.3.3.6 MINV: Minimum Core VoltageThis location contains the minimum Processor Core voltage. This field, roun

Document Number: 318080-002 13Introduction1.2 State of DataThis document contains preliminary information on new products in production. The specific

Features130 Document Number: 318080-0027.4.3.4.1 RES3: Reserved 3These locations are reserved. Writes to this register have no effect.7.4.3.4.2 L2SIZE

Document Number: 318080-002 131Features7.4.3.4.5 MINV: Minimum Cache VoltageThis location contains the minimum Cache voltage. This field, rounded to t

Features132 Document Number: 318080-0027.4.3.5.2 RES5: Reserved 5This location is reserved. Writes to this register have no effect.7.4.3.5.3 PDCKS: Pa

Document Number: 318080-002 133Features7.4.3.6.2 RES6: Reserved 6This location is reserved. Writes to this register have no effect.7.4.3.6.3 Processor

Features134 Document Number: 318080-0027.4.3.6.4 RES7: Reserved 7This location is reserved. Writes to this register have no effect.7.4.3.6.5 PNDCKS: P

Document Number: 318080-002 135Features7.4.3.8 Feature Data This section provides information on key features that the platform may need to understand

Features136 Document Number: 318080-0027.4.3.8.4 Additional Processor Feature FlagsThis location contains additional feature information for the proce

Document Number: 318080-002 137Features7.4.4 ChecksumsThe PIROM includes multiple checksums. Table 7-7 includes the checksum values for each section d

Features138 Document Number: 318080-002

Document Number: 318080-002 139Boxed Processor Specifications8 Boxed Processor Specifications8.1 IntroductionThe Intel® Xeon® Processor 7200 Series a

Introduction14 Document Number: 318080-002

Boxed Processor Specifications140 Document Number: 318080-002

Document Number: 318080-002 141Debug Tools Specifications9 Debug Tools Specifications9.1 Debug Port System Requirements The Intel® Xeon® Processor 720

Debug Tools Specifications142 Document Number: 318080-0029.2.2 Electrical ConsiderationsThe LAI will also affect the electrical performance of the FSB

Document Number: 318080-002 15Electrical Specifications2 Electrical Specifications2.1 Front Side Bus and GTLREFMost Intel® Xeon® Processor 7200 Serie

Electrical Specifications16 Document Number: 318080-002remains within the specifications listed in Table 2-9. Failure to do so can result in timing vi

Document Number: 318080-002 17Electrical SpecificationsNotes:1. Individual processors operate only at or below the frequency marked on the package.2.

Electrical Specifications18 Document Number: 318080-002outputs. Please refer to Table 2-12 for the DC specifications for these signals. A voltage rang

Document Number: 318080-002 19Electrical SpecificationsNotes:1. When this VID pattern is observed, the voltage regulator output should be disabled.2.

2 Document Number: 318080-002INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL

Electrical Specifications20 Document Number: 318080-0022.5 Reserved, Unused, or Test SignalsAll Reserved signals must remain unconnected. Connection o

Document Number: 318080-002 21Electrical SpecificationsNotes:1. Refer to Section 5 for signal descriptions.2. These signals may be driven simultaneous

Electrical Specifications22 Document Number: 318080-002Table 2-5 outlines the signals which include on-die termination (RTT). Table 2-6 outlines non A

Document Number: 318080-002 23Electrical Specifications2.9 Mixing ProcessorsIntel supports and validates multi-processor configurations only in which

Electrical Specifications24 Document Number: 318080-0022.11 Processor DC SpecificationsThe following notes apply:• The processor DC specifications in

Document Number: 318080-002 25Electrical Specifications2.11.1 Flexible Motherboard Guidelines (FMB)The Flexible Motherboard (FMB) guidelines are estim

Electrical Specifications26 Document Number: 318080-002Notes:1. Unless otherwise noted, all specifications in this table apply to all processors and a

Document Number: 318080-002 27Electrical Specifications9. Minimum VCC and maximum ICC are specified at the maximum processor case temperature (TCASE)

Electrical Specifications28 Document Number: 318080-002Notes:1. Processor or Voltage Regulator thermal protection circuitry should not trip for load c

Document Number: 318080-002 29Electrical SpecificationsNotes:1. Processor or Voltage Regulator thermal protection circuitry should not trip for load c

Document Number: 318080-002 3Contents1Introduction...

Electrical Specifications30 Document Number: 318080-002Table 2-10. VCC Static and Transient ToleranceICC (A) VCC_Max (V) VCC_Typ (V) VCC_Min (V) Notes

Document Number: 318080-002 31Electrical SpecificationsNotes:1. The VCC_MIN and VCC_MAX loadlines represent static and transient limits. Please see Se

Electrical Specifications32 Document Number: 318080-002Notes:1. The VCC_MIN and VCC_MAX loadlines represent static and transient limits. Please see Se

Document Number: 318080-002 33Electrical SpecificationsNotes:1. The VCC_MIN and VCC_MAX loadlines represent static and transient limits. Please see Se

Electrical Specifications34 Document Number: 318080-002Notes:1. The VCC_MIN and VCC_MAX loadlines represent static and transient limits. Please see Se

Document Number: 318080-002 35Electrical SpecificationsNotes:1. Unless otherwise noted, all specifications in this table apply to all processor freque

Electrical Specifications36 Document Number: 318080-0027300 Series contains Digital Thermal Sensors (DTS) distributed throughout the die. These sensor

Document Number: 318080-002 37Electrical Specifications2.11.3 VCC Overshoot SpecificationProcessors can tolerate short transient overshoot events wher

Electrical Specifications38 Document Number: 318080-002Notes:1. VOS is the measured overshoot voltage.2. TOS is the measured time duration above VID.2

Document Number: 318080-002 39Electrical SpecificationsNotes:1. Unless otherwise noted, all specifications in this table apply to all processor freque

4 Document Number: 318080-0026.2.3 Thermal Monitor 2 ...1046.2.4 On-Deman

Electrical Specifications40 Document Number: 318080-0022.12 Front Side Bus AC SpecificationsThe processor FSB timings specified in this section are de

Document Number: 318080-002 41Electrical Specifications5. Specification is for a minimum swing is specified into the test circuit described in Figure

Electrical Specifications42 Document Number: 318080-002Notes:1. Unless otherwise noted, all specifications in this table apply to all processor freque

Document Number: 318080-002 43Electrical SpecificationsNotes: 1. Unless otherwise noted, all specifications in this table apply to all processor freq

Electrical Specifications44 Document Number: 318080-002Notes:1. See Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 11.0 D

Document Number: 318080-002 45Electrical Specifications2.13 Processor AC Timing WaveformsThe following figures are used in conjunction with the AC tim

Electrical Specifications46 Document Number: 318080-002Figure 2-11. Electrical Test CircuitFigure 2-12. TCK Clock WaveformV2V1TpTCKTp = T55: PeriodV1,

Document Number: 318080-002 47Electrical SpecificationsFigure 2-13. Differential Clock WaveformCrossingVoltageThresholdRegionVHVLOvershootUndershootRi

Electrical Specifications48 Document Number: 318080-002Notes:1. Waveform at pin is non-monotonic. Waveform at pad is monotonic.2. Differential Edge Ra

Document Number: 318080-002 49Electrical SpecificationsFigure 2-17. FSB Source Synchronous 2X (Address) Timing WaveformTp/4 Tp/2 3Tp/4BCLK0BCLK1ADSTB#

Document Number: 318080-002 5Figures2-1 Quad-Core Intel® Xeon® L7345 Processor Load Current versus Time ...272-2 Dual-Core Dual-Cor

Electrical Specifications50 Document Number: 318080-002Figure 2-18. FSB Source Synchronous 4X (Data) Timing WaveformBCLK0BCLK1Tp/4Tp/2 3Tp/4DSTBp# (@

Document Number: 318080-002 51Electrical SpecificationsNote: Please refer to Table 2-12 for TAP Signal Group DC specifications and Table 2-24 for TAP

Electrical Specifications52 Document Number: 318080-002Figure 2-22. SMBus Timing WaveformDataClkP PSSSTOP STOPSTART STARTtLOWtRtHD;STAtHD;DATtBUFHIGHt

Document Number: 318080-002 53Electrical SpecificationsFigure 2-24. Voltage Sequence Timing RequirementsBCLKVccPWRGOODRESET#TdVTTTa TbVCC_BOOTTeVCCPLL

Electrical Specifications54 Document Number: 318080-002Notes:1. Ta = T40 (FERR# Valid Delay from STPCLK# Deassertion).2. FERR# / PBE# is undefined fro

Document Number: 318080-002 55Electrical Specifications§Figure 2-27. VID Step Times and Vcc WaveformsVIDVCC(max)VCC(min)nn-1n-2n-3n-4n-6 = VIDTM2n-1n-

Electrical Specifications56 Document Number: 318080-002

Document Number: 318080-002 57Mechanical Specifications3 Mechanical SpecificationsThe Intel® Xeon® Processor 7200 Series and 7300 Series is packaged i

Mechanical Specifications58 Document Number: 318080-002Figure 3-2.Processor Package Drawing (Sheet 1 of 2)

Document Number: 318080-002 59Mechanical SpecificationsFigure 3-3.Processor Package Drawing (Sheet 2 of 2)

6 Document Number: 318080-0026-8 Conceptual Fan Control Diagram For a PECI-Based Platform ...1087-1 Stop Clock State Ma

Mechanical Specifications60 Document Number: 318080-0023.2 Processor Component Keepout ZonesThe processor may contain components on the substrate that

Document Number: 318080-002 61Mechanical SpecificationsFigure 3-4.Top Side Board Keepout Zones (Part 1)

Mechanical Specifications62 Document Number: 318080-002Figure 3-5.Top Side Board Keepout Zones (Part 2)

Document Number: 318080-002 63Mechanical SpecificationsFigure 3-6.Bottom Side Board Keepout Zones

Mechanical Specifications64 Document Number: 318080-002Figure 3-7.Board Mounting-Hole Keepout Zones

Document Number: 318080-002 65Mechanical SpecificationsFigure 3-8.Volumetric Height Keep-Ins

Mechanical Specifications66 Document Number: 318080-0023.3 Package Loading SpecificationsTable 3-1 provides dynamic and static load specifications for

Document Number: 318080-002 67Mechanical Specifications3.4 Package Handling GuidelinesTable 3-2 includes a list of guidelines on package handling in t

Mechanical Specifications68 Document Number: 318080-0023.8 Processor MarkingsFigure 3-9 shows the topside markings and Figure 3-10 shows the bottom-si

Document Number: 318080-002 69Mechanical Specifications3.9 Processor Pin-Out CoordinatesFigure 3-11 shows the top view of the processor pin coordinate

Document Number: 318080-002 77-2 Extended HALT Maximum Power... 1137-3 Memory Dev

Mechanical Specifications70 Document Number: 318080-002

Document Number: 318080-002 71Pin Listing4 Pin Listing4.1 Pin AssignmentsSection 2.6 contains the front side bus signal groups for the Intel® Xeon® Pr

Pin Listing72 Document Number: 318080-002BPMb3# AE3 Common Clk Input/OutputBPRI# D23 Common Clk InputBR0# D20 Common Clk Input/OutputBR1# F12 Common C

Document Number: 318080-002 73Pin ListingDEFER# C23 Common Clk InputDP0# AC18 Common Clk Input/OutputDP1# AE19 Common Clk Input/OutputDP2# AC15 Common

Pin Listing74 Document Number: 318080-002SM_WP AD29 SMBus InputSMI# C27 Async GTL+ InputSTPCLK# D4 Async GTL+ InputTCK E24 TAP InputTDI C24 TAP InputT

Document Number: 318080-002 75Pin ListingVCCM1 Power/OtherVCCM3 Power/OtherVCCM5 Power/OtherVCCM7 Power/OtherVCCM9 Power/OtherVCCM23 Power/OtherVCCM25

Pin Listing76 Document Number: 318080-002VCCAB14 Power/OtherVCCAB18 Power/OtherVCCAB24 Power/OtherVCCAB30 Power/OtherVCCAC3 Power/OtherVCCAC16 Power/O

Document Number: 318080-002 77Pin ListingVSSJ9 Power/OtherVSSJ23 Power/OtherVSSJ25 Power/OtherVSSJ27 Power/OtherVSSJ29 Power/OtherVSSJ31 Power/OtherVS

Pin Listing78 Document Number: 318080-002VSSV9 Power/OtherVSSV23 Power/OtherVSSV25 Power/OtherVSSV27 Power/OtherVSSV29 Power/OtherVSSV31 Power/OtherVS

Document Number: 318080-002 79Pin Listing4.1.2 Pin Listing by Pin NumberTable 4-2. Pin Listing by Pin Number (Sheet 1 of 14)Pin No. Pin NameSignal Buf

8 Document Number: 318080-002Revision History§Document NumberRevision Description Date318080 -001 • Initial Release September 2007318080 -002 • Change

Pin Listing80 Document Number: 318080-002C23 DEFER# Common Clk InputC24 TDI TAP InputC25 VSSPower/Other InputC26 IGNNE# Async GTL+ InputC27 SMI# Async

Document Number: 318080-002 81Pin ListingF18 DBSY# Common Clk Input/OutputF19 VSSPower/OtherF20 BNR# Common Clk Input/OutputF21 RS2# Common Clk InputF

Pin Listing82 Document Number: 318080-002L3 VSSPower/OtherL4 VCCPower/OtherL5 VSSPower/OtherL6 VCCPower/OtherL7 VSSPower/OtherL8 VCCPower/OtherL9 VSSP

Document Number: 318080-002 83Pin ListingT1 VSSPower/OtherT2 VCCPower/OtherT3 VSSPower/OtherT4 VCCPower/OtherT5 VSSPower/OtherT6 VCCPower/OtherT7 VSSP

Pin Listing84 Document Number: 318080-002Y17 DSTBP1# Source Sync Input/OutputY18 DSTBN1# Source Sync Input/OutputY19 VSSPower/OtherY20 DSTBP0# Source

Document Number: 318080-002 85Pin Listing§AC12 D41# Source Sync Input/OutputAC13 VSSPower/OtherAC14 D50# Source Sync Input/OutputAC15 DP2# Common Clk

Pin Listing86 Document Number: 318080-002

Document Number: 318080-002 87Signal Definitions5 Signal Definitions5.1 Signal Definitions.Table 5-1. Signal Definitions (Sheet 1 of 8)Name Type Descr

Signal Definitions88 Document Number: 318080-002BINIT# I/O BINIT# (Bus Initialization) may be observed and driven by all processor FSB agents and if u

Document Number: 318080-002 89Signal DefinitionsD[63:0]# I/O D[63:0]# (Data) are the data signals. These signals provide a 64-bit data path between th

Document Number: 318080-002 9Introduction1 IntroductionALL INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE.The Intel® Xeon® Processor 7200 Series a

Signal Definitions90 Document Number: 318080-002DSTBN[3:0]# I/O Data strobe used to latch in D[63:0]#.DSTBP[3:0]# I/O Data strobe used to latch in D[6

Document Number: 318080-002 91Signal DefinitionsIGNNE# I IGNNE# (Ignore Numeric Error) is asserted to force the processor to ignore a numeric error an

Signal Definitions92 Document Number: 318080-002PWRGOOD I PWRGOOD (Power Good) is an input. The processor requires this signal to be a clean indicatio

Document Number: 318080-002 93Signal DefinitionsSMI# I SMI# (System Management Interrupt) is asserted asynchronously by system logic. On accepting a S

Signal Definitions94 Document Number: 318080-002§VID[6:1] O VID[6:1] (Voltage ID) pins are used to support automatic selection of power supply voltage

Document Number: 318080-002 95Thermal Specifications6 Thermal Specifications6.1 Package Thermal SpecificationsThe Intel® Xeon® Processor 7200 Series a

Thermal Specifications96 Document Number: 318080-002Additionally, utilization of a thermal solution that does not meet the Thermal Profile will violat

Document Number: 318080-002 97Thermal SpecificationsNotes:1. Please refer to Table 6-2 for discrete points that constitute the thermal profile.2. Impl

Thermal Specifications98 Document Number: 318080-002Notes:1. These values are specified at VCC_MAX for all processor frequencies. Systems must be desi

Document Number: 318080-002 99Thermal SpecificationsNotes:1. These values are specified at VCC_MAX for all processor frequencies. Systems must be desi